DK-DEV-5SGXEA7N【PDF 215/527 页】KIT DEV STRATIX V FPGA 5SGXEA7

您好，
买卖IC网欢迎您。
请登录
免费注册

211页 212页 213页 214页 [215页]216页 217页 218页 219页

7-24

IOE Registers

SV51008

2014.01.10

Related Information

Dynamic OCT in Stratix V Devices on page 5-28

Provides more information about dynamic OCT control.

IOE Registers

The IOE registers are expanded to allow source-synchronous systems to have faster register-to-FIFO transfers

and resynchronization. All top, bottom, and right IOEs have the same capability.

Input Registers

The input path consists of the DDR input registers and the read FIFO block. You can bypass each block of

the input path.

There are three registers in the DDR input registers block. Two registers capture data on the positive and

negative edges of the clock while the third register aligns the captured data. You can choose to use the same

clock for the positive and negative edge registers or two complementary clocks (DQS/CQ for the positive-

edge register and DQSn/CQn for the negative-edge register). The third register that aligns the captured data

uses the same clock as the positive edge registers.

The read FIFO block resynchronizes the data to the system clock domain and lowers the data rate to half

rate.

The following figure shows the registers available in the Stratix V input path. For DDR3 and DDR2 SDRAM

interfaces, the DQS and DQSn signals must be inverted. If you use Altera ’ s memory interface IPs, the DQS

and DQSn signals are automatically inverted.

Figure 7-13: IOE Input Registers for Stratix V Devices

Double Data Rate Input Registers

DQ

D

Q

datain [0]

dataout[3..0]

To core

DFF

D

Q

Read FIFO

Input Reg AI

The input

clock can be

D

Q neg_reg_out D

Q

datain [1]

from the DQS

logic block or

from a global

clock line.

Differential

Input

Buffer

DFF

Input Reg BI

DFF

Input Reg CI

This half-rate read

clock comes from a

PLL through the

clock network

DQS/CQ

DQSn

0

wrclk

rdclk

Half-rate clock

CQn

This input clock comes

1

from the CQn logic block.

Output Registers

The Stratix V output and output-enable path is divided into the HDR block, alignment registers, and output

and output-enable registers. The device can bypass each block of the output and output-enable path.

The output path is designed to route combinatorial or registered single data rate (SDR) outputs and full-rate

or half-rate DDR outputs from the FPGA core. Half-rate data is converted to full-rate with the HDR block,

clocked by the half-rate clock from the PLL.

Altera Corporation

External Memory Interfaces in Stratix V Devices

Send Feedback

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

我的联系方式

*

*

*

相关PDF资料

DK-DSP-2S180N DSP PRO KIT W/SII EP2S180N

DK-DSP-3C120N KIT DEV DSP CYCLONE III EDITION

DK-K7-CONN-CES-G KINTEX-7 FPGA CONNECTIVITY KIT

DK-K7-EMBD-CES-G-J KINTEX-7 FPGA EMBEDDED KIT JAPAN

DK-MAXII-1270N KIT DEV MAXII W/EPM 1270N

DK-N2EVAL-3C25N KIT DEV NIOS II CYCLONE III ED.

DK-NIOS-2C35N NIOS II KIT W/CYCLONE II EP2C35N

DK-NIOS-2S60N NIOS II KIT W/STRATIX II EP2S60N

相关代理商/技术参数

DK-DSP-2C70N 功能描述:DSP KIT W/CYCLONE II EPS2C70N RoHS:是类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等）系列:Cyclone® II 产品培训模块:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色产品:Blackfin? BF50x Series Processors 标准包装:1 系列:Blackfin® 类型:DSP 适用于相关产品:ADSP-BF548 所含物品:板，软件，4x4 键盘，光学拨轮，QVGA 触摸屏 LCD 和 40G 硬盘配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相关产品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA

DK-DSP-2S180N 功能描述:DSP PRO KIT W/SII EP2S180N RoHS:是类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等）系列:Stratix® II 产品培训模块:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色产品:Blackfin? BF50x Series Processors 标准包装:1 系列:Blackfin® 类型:DSP 适用于相关产品:ADSP-BF548 所含物品:板，软件，4x4 键盘，光学拨轮，QVGA 触摸屏 LCD 和 40G 硬盘配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相关产品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA

DK-DSP-2S60N 功能描述:DSP KIT W/STRATIX II EP2S60N RoHS:是类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等）系列:Stratix® II 产品培训模块:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色产品:Blackfin? BF50x Series Processors 标准包装:1 系列:Blackfin® 类型:DSP 适用于相关产品:ADSP-BF548 所含物品:板，软件，4x4 键盘，光学拨轮，QVGA 触摸屏 LCD 和 40G 硬盘配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相关产品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA

DK-DSP-3C120N 功能描述:可编程逻辑 IC 开发工具 FPGA Development Kit For EP3C120F780 RoHS:否制造商:Altera Corporation 产品:Development Kits 类型:FPGA 工具用于评估:5CEFA7F3 接口类型: 工作电源电压:

DK-DSP-3SL150N 功能描述:可编程逻辑 IC 开发工具 FPGA Development Kit For EP3SL150F1152 RoHS:否制造商:Altera Corporation 产品:Development Kits 类型:FPGA 工具用于评估:5CEFA7F3 接口类型: 工作电源电压:

DK-DTK-120HW 制造商:FLORIDA MISC. 功能描述:

DKE10 制造商:MEANWELL 制造商全称:Mean Well Enterprises Co., Ltd. 功能描述:10W DC-DC Regulated Dual Output Converter

DKE10A-05 功能描述:DC/DC转换器 9-18Vin +/-5Vout 100-1000mA, 10W RoHS:否制造商:Murata 产品: 输出功率: 输入电压范围:3.6 V to 5.5 V 输入电压（标称）: 输出端数量:1 输出电压（通道 1）:3.3 V 输出电流（通道 1）:600 mA 输出电压（通道 2）: 输出电流（通道 2）: 安装风格:SMD/SMT 封装 / 箱体尺寸: